Speaker
Description
A test-bench is created that injects digital pulses that emulate ATLAS Liquid Argon (LAr) Front End Board electronic signal pulses in order to test prototypes. The prototypes are for new electronics for an upgrade to the CERN Large Hadron Collider that increases the rate of proton-proton collisions by an order of magnitude. This High-Luminosity Large Hadron Collider requires a completely new Trigger and Data Acquisition system to deal with information from detectors.
One system that is being developed is the Liquid Argon Signal Processor (LASP) which has an architecture based on Field Programmable Gate Arrays (FPGA). Validation of individual modules of the LASP is of key importance in the development cycle. Additionally, verification of module behaviour with simulated ATLAS pulses will allow the full system to be tested with realistic conditions before data taking.
The injector project is implemented on an Intel Stratix 10 FPGA, that uses optimised GbE Ethernet technologies to communicate with a workstation in order to transfer Monte Carlo simulation pulses to the FPGA. The pulses are then buffered and injected to the LASP, mimicking the operation of the Front End Boards (FEB2s). The user is in complete control of the data pulses injected which is a vital property that enables the test of LASP behaviour for different cases and possible failure modes. A complete overview of the injector design, its performance, as well as its benefit to the LAr-LASP is shown in this talk.
| email address | shroffm2@uvic.ca |
|---|---|
| Please select: Experiment or Theory | Instrumentation |
